Etching (microfabrication)

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Etching tanks used to perform Piranha, Hydrofluoric acid or RCA clean on 4-inch wafer batches at LAAS technological facility in Toulouse, France.
Etching tanks used to perform Piranha, Hydrofluoric acid or RCA clean on 4-inch wafer batches at LAAS technological facility in Toulouse, France.

Etching is used in microfabrication to chemically remove layers from the surface of a wafer during manufacturing. Etching is a critically important process module, and every wafer undergoes many etching steps before it is complete.

For many etch steps, part of the wafer is protected from the etchant by a "masking" material which resists etching. In some cases, the masking material is photoresist which has been patterned using photolithography. Other situations require a more durable mask, such as silicon nitride.

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If the etch is intended to make a cavity in a material, the depth of the cavity may be controlled approximately using the etching time and the known etch rate. More often, though, etching must entirely remove the top layer of a multilayer structure, without damaging the underlying or masking layers. The etching system's ability to do this depends on the ratio of etch rates in the two materials (selectivity).

Some etches undercut the masking layer and form cavities with sloping sidewalls. The distance of undercutting is called bias. Etchants with large bias are called isotropic, because they erode the substrate equally in all directions. Modern processes greatly prefer anisotropic etches, because they produce sharp, well-controlled features.

Yellow: layer to be removed; blue: layer to remain
  1. A poorly selective etch removes the top layer, but also attacks the underlying material.
  2. A highly selective etch leaves the underlying material unharmed.
Red: masking layer; yellow: layer to be removed
  1. A perfectly isotropic etch produces round sidewalls.
  2. A perfectly anisotropic etch produces vertical sidewalls.

The two fundamental types of etchants are liquid-phase ("wet") and plasma-phase ("dry"). Each of these exists in several varieties.

The first etching processes used liquid-phase ("wet") etchants. The wafer can be immersed in a bath of etchant, which must be agitated to achieve good process control. For instance, buffered hydrofluoric acid (HF) was used commonly to etch silicon dioxide over a silicon substrate.

Different specialised etchants can be used to characterise the surface etched.

Wet etchants are usually isotropic, which leads to large bias when etching thick films. They also require the disposal of large amounts of toxic waste. For these reasons, they are seldom used in state-of-the-art processes. However, the photographic developer used for photoresist resembles wet etching.

As an alternative to immersion, some machines employ a gas (usually, pure nitrogen) to cushion and protect one side of the wafer while etchant is applied to the other side (usually the back). This etch method is particularly effective just before "backend" processing (BEOL), where wafers are normally very much thinner after wafer backgrinding, and very sensitive to thermal or mechanical stress. Etching a thin layer of even a few micrometres dramatically increases the wafer strength at this stage.

Modern VLSI processes avoid wet etching, and use plasma etching instead. Plasma systems can operate in several modes by adjusting the parameters of the plasma. Ordinary plasma etching operates between 0.1 and 5 Torr. (This unit of pressure, commonly used in vacuum engineering, equals approximately 133.3 pascals.) The plasma produces energetic free radicals, neutrally charged, that react at the surface of the wafer. Since neutral particles attack the wafer from all angles, this process is isotropic.

The source gas for the plasma usually contains small molecules rich in chlorine or fluorine. For instance, carbon tetrachloride (CCl4) etches silicon and aluminium, and trifluoromethane etches silicon dioxide and silicon nitride. A plasma containing oxygen is used to oxidize ("ash") photoresist and facilitate its removal.

Ion milling, or sputter etching, uses lower pressures, often as low as 10-4 Torr (10 mPa). It bombards the wafer with energetic ions of noble gases, often Ar+, which knock atoms from the substrate by transferring momentum. Because the etching is performed by ions, which approach the wafer approximately from one direction, this process is highly anisotropic. On the other hand, it tends to display poor selectivity. Reactive-ion etching (RIE) operates under conditions intermediate between sputter and plasma etching (between 10-3 and 10-1 Torr). Deep reactive-ion etching (DRIE) modifies the RIE technique to produce deep, narrow features.

An anisotropic wet etch on a silicon wafer creates a cavity with a trapezoidal cross-section.  The bottom of the cavity is a <100> plane (see Miller indices), and the sides are <111> planes.  The yellow material is an etch mask, and the blue material is silicon.
An anisotropic wet etch on a silicon wafer creates a cavity with a trapezoidal cross-section. The bottom of the cavity is a <100> plane (see Miller indices), and the sides are <111> planes. The yellow material is an etch mask, and the blue material is silicon.

Some wet etchants etch crystalline materials at very different rates depending upon which crystal face is exposed. In single-crystal materials (e.g. silicon wafers), this effect can allow very high anisotropy, as shown in the figure.

Several anisotropic wet etchants are available for silicon. For instance, potassium hydroxide (KOH) can achieve selectivity of 400 between <100> and <111> planes. Another option is EDP (an aqueous solution of ethylene diamine and pyrocatechol), which also displays high selectivity for p-type doping. Neither of these etchants may be used on wafers that contain CMOS integrated circuits. Both of them etch aluminium, commonly used as a metallization (wiring) material. KOH introduces mobile potassium ions into silicon dioxide, and EDP is highly corrosive and carcinogenic. Tetramethylammonium hydroxide (TMAH) presents a safer alternative, although it has even worse selectivity between <100> and <111> planes in silicon than does EDP.

  • Jaeger, Richard C. (2002). "Lithography", Introduction to Microelectronic Fabrication. Upper Saddle River: Prentice Hall. ISBN 0-201-44494-7. 
  • Ibid, "Processes for MicroElectroMechanical Systems (MEMS)"

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